Ja-heum Koo, head of technology development at Samsung's Foundry Business, said in Samsung Newsroom that the company plans to use its 2nm GAA process for HBM5.
Samsung Electronics says the base layer of its next high-bandwidth memory chip, HBM5, will borrow a process usually reserved for smartphone and AI logic chips: a cutting-edge 2-nanometer node. The goal is concrete, pushing operating speed up more than 50% over the current HBM4E generation. Ja-heum Koo, VP and head of technology development at Samsung's Foundry Business, laid out the plan in an interview posted to Samsung's semiconductor newsroom on July 27.
HBM stacks several DRAM dies and bonds the stack next to a GPU. At the bottom sits the base die, a wiring and control layer beneath the storage floors stacked above it.

That base die has run on a roughly 4-nanometer process until now. Samsung wants to switch it to the same 2-nanometer GAA (Gate-All-Around) node it uses for smartphone and GPU logic chips.
Samsung's own framing, echoed across Korean outlets, leads with speed.
Samsung Electronics "HBM5 to enhance operating speed by 50% with a leading-edge 2nm process" (Kyunghyang Shinmun, 2026-07-27)Taiwan's DigiTimes framed the same news differently, leading with a "heat challenge" instead. Each HBM generation moves more data per second, drawing more power, and that power leaves the stack as heat that a tightly packed die stack struggles to shed. Hitting 50% needs tighter power control, and that is what GAA does: a gate wrapping all four sides of the channel leaks less than the older FinFET design, which covers only three.
SK hynix, not Samsung, actually leads the HBM market and drives most of Nvidia's HBM supply. What Samsung is putting on the table isn't a memory breakthrough. It's a logic process borrowed from its own foundry, possible only because Samsung houses memory, foundry and packaging under one roof. SK hynix, a pure memory maker, has no equivalent card.
Samsung Applies 2nm to HBM5 First; SK to Accelerate Output via AI Factory (Seoul Economic Daily, 2026-06-02)SK hynix picked volume instead: doubling capacity over five years with roughly 31 trillion won in new fab spending. Koo's own career mirrors this split, he led DRAM development and is credited for Samsung's HBM success, and now runs the foundry side that is lending logic know-how back to memory.
2nm GAA solves both speed and power at once. Samsung is using a real technology edge to shake up the HBM order.
Samsung Foundry's 2nm GAA hasn't proven high-volume yield yet, and HBM5 itself won't ship until 2027 or 2028.
Having the technology and turning it into chips at workable yield are different things. Samsung Foundry's own yield struggles at 3nm are the reason for that caution, and whether this plan turns into results will show at HBM5's sample and mass-production stage.
Why it matters · Samsung and SK hynix are now betting on opposite strategies, technology versus capacity, to win the HBM race. Because only an integrated chipmaker can play Samsung's card, whether it works becomes a test of Samsung's whole conglomerate model.
Worth asking · Samsung's technology bet versus SK hynix's capacity bet: which strategy wins the HBM5 era?
Awaiting gradingTo be scored when HBM5 actually ships (industry estimates put this around 2027-2028): whether the 2nm GAA base die reaches mass production and the 50%+ speed target over HBM4E holds up.